1. Field of the Invention
The present invention relates to the separation of binary data from a demodulated data signal. More particularly, the present invention relates to the use of a comparator to separate binary data from a demodulated data signal in the presence of noise and arbitrary duty-cycle.
2. Art Background
This invention relates to the problem of binary data recovery in uncertain and noisy environments, as illustrated in FIGS. 1(a), 1(b), and 1(c). Typically, a data signal is derived from an original binary datastream recovered from a transmission medium (e.g., a radio channel), or a storage medium (e.g., a magnetic disk drive). FIG. 1(a) is a block diagram representation illustrating the separation of binary data from a radio signal received through a receiver 1, and demodulated by a demodulator 2. The demodulated signal is then fed to a data separator 3 which separates the binary data into digitally recognizable ones and zeros. FIG. 1(b) illustrates an exemplary input signal, and FIG. 1(c) illustrates the corresponding output signal. As is commonly the case, the demodulated data signal is corrupted by noise, or voltage excursions not part of the datastream as originally transmitted. Moreover, the demodulated signal may have imposed a D.C. bias, which is an offset from the ground voltage reference, originating from the circuitry used to receive and demodulate said binary signal. When the noise is not insignificant in relation to the signal amplitude, and when the D.C. offset is relatively large and of unknown or variable value, the task of deriving an accurate representation of the demodulated digital datastream from the signal in order to preserve the original sequence of logical ones and zeros becomes difficult. A comparator is generally chosen as data separator 3, determining whether a particular data value consists of a logical one or a logical zero, with the comparator's decision determined by a threshold reference voltage applied to the device. This threshold voltage should be approximately midway between the signal peaks 4, 5 (FIG. 1(b)), in order to provide the greatest immunity to errors from noise.
However, the D.C. offset of the demodulated signal is frequently unknown, or is of variable magnitude. Attention now is directed to FIGS. 2(a), 2(b), 2(c), and 2(d). A common approach to the D.C. offset problem, shown in FIG. 2(a), is to A.C. couple the signal by inserting a capacitor 7 between the demodulated signal and a comparator 9, with a resistor 8 shunt to ground. For an arbitrary demodulated binary signal, FIG. 2(b), the A.C. coupling shown in FIG. 2(a), will remove the D.C. average value of the demodulated signal. The demodulated signal, (FIG. 2(b)), then becomes centered such that the arithmetric average is zero volts (FIG. 2(c)). A reference threshold voltage value of zero volts is then applied to comparator 9. The output of comparator 9 is a digital waveform as shown in FIG. 2(d). The foregoing A.C. coupling method works reasonably well if the noise contained in the demodulated signal is not large and if the duty cycle of the datastream is not at an extreme, where the duty cycle is the percentage of time the demodulated signal occupies the logical one state per unit time.
Attention now is directed to FIGS. 3(a), 3(b), 3(c), and 3(d). Even with A.C. coupling, a data separation problem still may arise when noise is present and the demodulated data signal duty cycle is either very high or very low, i.e., lengthy periods of nearly all logical zeros or all logical ones (FIG. 3(b)). Because the A.C. coupling removes any D.C. average component from the demodulated signal before the demodulated signal reaches the comparator, the decision threshold voltage is no longer near the midpoint of the peaks. Rather, the decision threshold can be very near the value of either peak (FIG. 3(c)), any noise contained in the demodulated datastream can render the determination of digital ones and zeros by the comparator very susceptible to error. For example, when the duty-cycle of the demodulated datastream is at an extreme low condition, i.e., the datastream is almost all logical zeros, the average voltage of the demodulated datastream will be very close to logical zero. In such a case, a positive voltage spike due to noise could cause the comparator to "read" an unintended logical one, thereby inducing an error 13 in the derived output data signal (FIG. (3(d)).
FIGS. 4(a) and 4(b) illustrate a solution known in the art to the variable D.C. offset present on the demodulated signal. In FIG. 4(a), a resistor 41 and a capacitor 42 shunt to ground form a low-pass filter, wherein a low-pass filtered version of the demodulated signal is delivered to the threshold input of a comparator 43. In FIG. 4(a), a demodulated signal (FIG. 4(b)) is compared against its own D.C. average as a decision threshold voltage (FIG. 4(c)), producing an output signal (FIG. 4(d)). The configuration shown in FIG. 4(a) is virtually analogous to the A.C. coupling approach discussed above in relation to FIG. 2(a)-(d), except that the D.C. average of demodulated signal floats, and is not centered about zero volts. However, the configuration as shown in FIG. 4(a) is equally susceptible to noise-induced data errors when duty cycle nears an extreme. If a voltage spike due to noise is contained in the demodulated signal (FIG. 4(b), 45), comparator 43 will "see" the demodulated signal crossing the threshold reference of V.sub. DCavg, and will output an opposite logical state. As a result, the output data signal will contain a data error 46.
As will be described below in more detail, a novel and simple solution to the above problems is provided by a key alteration to the above described standard circuitry.